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may 2006 rev 4 1/25 1 m27c2001 2 mbit (256kb x 8) uv eprom and otp eprom features 5v 10% supply voltage in read operation access time: 55ns low power consumption: ? active current 30ma at 5mhz ? standby current 100a programming voltage: 12.75v 0.25v programming time: 100s/word electronic signature ? manufacturer code: 20h ? device code: 61h packages ? ecopack ? packages available. 1 32 32 1 fdip32w (f) pdip32 (b) plcc32 (c) tsop32 (n) 8 x 20 mm www.st.com
m27c2001 contents 2/25 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 two line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 system considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6 presto ii programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.7 program inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 program verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.9 electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.10 erasure operation (applies to uv eprom) . . . . . . . . . . . . . . . . . . . . . . . 10 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 part numbering scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
list of tables m27c2001 3/25 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3. electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 5. ac measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 6. capacitance (t a = 25c, f = 1 mhz). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 7. read mode dc characteristics (t a = 0 to 70c or ?40 to 85c; v cc = 5v 5% or 5v 10%; v pp = v cc ) . . . . . . . . . . . . 14 table 8. programming mode dc characteristics (t a = 25c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) . . . . . . . . . . . . . . . . . . . . . . . . 15 table 9. read mode ac characteristics (t a = 0 to 70c or ?40 to 85c; v cc = 5v 5% or 5v 10%; v pp = v cc ) . . . . . . . . . . . . 15 table 10. read mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 11. programming mode ac characteristics (t a = 25c; v cc = 6.25 0.25v; v pp = 12.75 0.25v) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 12. fdip32w - 32 pin ceramic frit-seal dip, with window, package mechanical data. . . . . . 19 table 13. pdip32 - 32 lead plastic dip, 600 mils width, package mechanical data . . . . . . . . . . . . . 20 table 14. plcc32 - 32 lead plastic leaded chip carrier, package mechanical data. . . . . . . . . . . . 21 table 15. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package mechanical data. . . . 22 table 16. ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
m27c2001 list of figures 4/25 list of figures figure 1. logic diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. dip connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. lcc connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. tsop connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. ac testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 figure 7. ac testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. read mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 9. programming and verify modes ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 10. fdip32w - 32 pin ceramic frit-seal dip, with window, package outline . . . . . . . . . . . . . 19 figure 11. pdip32 - 32 lead plastic dip, 600 mils width, package outline. . . . . . . . . . . . . . . . . . . . . 20 figure 12. plcc32 - 32 lead plastic leaded chip carrier, package outline . . . . . . . . . . . . . . . . . . . 21 figure 13. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package outline . . . . . . . . . . . 22
summary description m27c2001 5/25 1 summary description the m27c2001 is a high speed 2 mbit eprom offered in the two ranges uv (ultra violet erase) and otp (one time programmable). it is ideally suited for microprocessor systems requiring large programs and is organized as 262,144 by 8 bits. the fdip32w (window ceramic frit-seal package) has a transparent lids which allow the user to expose the chip to ultraviolet light to erase the bit pattern. a new pattern can then be written to the device by following the programming procedure. for applications where the content is programmed only one time and erasure is not required, the m27c2001 is offered in pdip32, plcc32 and tsop32 (8 x 20 mm) packages. in order to meet environmental requirements, st offers the m27c2001 in ecopack ? packages. ecopack packages are lead-free. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 1. logic diagram table 1. signal names a0-a17 address inputs q0-q7 data outputs e chip enable g output enable p program v pp program supply v cc supply voltage v ss ground ai00716b 18 a0-a17 p q0-q7 v pp v cc m27c2001 g e v ss 8
m27c2001 summary description 6/25 figure 2. dip connections figure 3. lcc connections a1 a0 q0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 q7 a14 a11 g e q5 q1 q2 q3 v ss q4 q6 a17 p a16 a12 v pp v cc a15 ai00717 m27c2001 8 1 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 ai00718 a17 a8 a10 q5 17 a1 a0 q0 q1 q2 q3 q4 a7 a4 a3 a2 a6 a5 9 p a9 1 a16 a11 a13 a12 q7 32 v pp v cc m27c2001 a15 a14 q6 g e 25 v ss
summary description m27c2001 7/25 figure 4. tsop connections a1 a0 q0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 q7 a14 a11 g e q5 q1 q2 q3 q4 q6 a17 p a16 a12 v pp v cc a15 ai01153b m27c2001 (normal) 8 1 9 16 17 24 25 32 v ss
m27c2001 device operation 8/25 2 device operation the operating modes of the m27c2001 are listed in the ta ble 2 . a single power supply is required in the read mode. all inputs are ttl levels except for v pp and 12v on a9 for electronic signature. 2.1 read mode the m27c2001 has two control functions, both of which must be logically active in order to obtain data at the outputs. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins, independent of device selection. assuming that the addresses are stable, the address access time (t av q v ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the fa lling edge of g , assuming that e has been low and the addresses have been stable for at least t avqv -t glqv . 2.2 standby mode the m27c2001 has a standby mode which reduces the supply current from 30ma to 100a. the m27c2001 is placed in the standby mode by applying a cmos high signal to the e input. when in the standby mode, the outputs are in a high impedance state, independent of the g input. 2.3 two line output control because eprom devices are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. the two line control function allows: a) the lowest possible memory power dissipation, b) complete assurance that output bus contention will not occur. for the most efficient use of these two control lines, e should be decoded and used as the primary device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. 2.4 system considerations the power switching characteristics of advanced cmos eproms require careful decoupling of the devices. the supply current, i cc , has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by t he falling and rising edges of e . the magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. the associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. it is recommended that a 0.1f ceramic capacitor be used on every device between v cc and v ss . this should
device operation m27c2001 9/25 be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. in addition, a 4.7f bulk electrolytic capacitor should be used between v cc and v ss for every eight devices. the bulk capacitor should be located near the power supply connection point. the purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of pcb traces. 2.5 programming when delivered (and after each erasure for uv eprom), all bits of the m27c2001 are in the '1' state. data is introduced by selectively programming '0's into the desired bit locations. although only '0's will be programmed, both '1's and '0's can be present in the data word. the only way to change a '0' to a '1' is by die exposure to ultraviolet light (uv eprom). the m27c2001 is in the programming mode when v pp input is at 12.75v, e is at v il and p is pulsed to v il . the data to be programmed is applied to 8 bits in parallel to the data output pins. the levels required for the address and data inputs are ttl. v cc is specified to be 6.25 0.25v. 2.6 presto ii programming algorithm presto ii programming algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 26.5 seconds. programming with presto ii consists of applying a sequence of 100s program pulses to each byte until a correct verify occurs (see figure 5 ). during programming and verify operation, a margin mode circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. no overprogram pulse is applied since the verify in margin mode provides the necessary margin to each programmed cell. figure 5. programming flowchart ai00715c n = 0 last addr verify p = 100 s pulse ++n = 25 ++ addr v cc = 6.25v, v pp = 12.75v fail check all bytes 1st: v cc = 6v 2nd: v cc = 4.2v yes no yes no yes no
m27c2001 device operation 10/25 2.7 program inhibit programming of multiple m27c2001s in parallel with different data is also easily accomplished. except for e , all like inputs including g of the parallel m27c2001 may be common. a ttl low level pulse applied to a m27c2001's p input, with e low and v pp at 12.75v, will program that m27c2001. a high level e input inhibits the other m27c2001s from being programmed. 2.8 program verify a verify (read) should be performed on the programmed bits to determine that they were correctly programmed. the verify is accomplished with e and g at v il , p at v ih , v pp at 12.75v and v cc at 6.25v. 2.9 electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. the es mode is functional in the 25 5c ambient temperature range that is required when programming the m27c2001. to activate the es mode, the programming equipment must force 11.5 to 12.5v on address line a9 of the m27c2001 with v pp = v cc = 5v. two identifier bytes may then be sequenced from the device outputs by toggling address line a0 from v il to v ih . all other address lines must be held at v il during electronic signature mode. byte 0 (a0 = v il ) represents the manufacturer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics m27c2001, these two identifier bytes are given in table 3 and can be read-out on outputs q7 to q0. 2.10 erasure operation (applies to uv eprom) the erasure characteristics of the m27c2001 are such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000?. it should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000? range. data shows that constant exposure to room level fluorescent lighting could erase a typical m27c2001 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. if the m27c2001 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the m27c2001 window to prevent unintentional erasure. the recommended erasure procedure for the m27c2001 is exposure to short wave ultraviolet light which has wavelength of 2537?. the integrated dose (i.e. uv intensity x exposure time) for erasure should be a minimum of 15w-s/cm2. the erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000w/cm2 power rating. the m27c2001 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. some lamps have a filter on their tubes which should be removed before erasure.
device operation m27c2001 11/25 note: x = v ih or v il , v id = 12 0.5v. table 2. operating modes mode e g p a9 v pp q7-q0 read v il v il xxv cc or v ss data out output disable v il v ih xxv cc or v ss hi-z program v il v ih v il pulse x v pp data in verify v il v il v ih xv pp data out program inhibit v ih xxxv pp hi-z standby v ih xxxv cc or v ss hi-z electronic signature v il v il v ih v id v cc codes table 3. electronic signature identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturer?s code v il 0 0 1 0 0 0 0 0 20h device code v ih 0 1 1 0 0 0 0 1 61h
m27c2001 maximum ratings 12/25 3 maximum ratings except for the rating "operating temperature range", stresses above those listed in the ta b l e 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affe ct device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit t a ambient operating temperature (1) 1. depends on range. ?40 to 125 c t bias temperature under bias ?50 to 125 c t stg storage temperature ?65 to 150 c v io (2) 2. minimum dc voltage on input or output is ?0.5v with possible undershoot to ?2.0v for a period less than 20ns. maximum dcvoltage on output is v cc +0.5v with possible overshoot to v cc +2v for a period less than 20ns. input or output voltage (except a9) ?2 to 7 v v cc supply voltage ?2 to 7 v v a9 (2) a9 voltage ?2 to 13.5 v v pp program supply voltage ?2 to 14 v
dc and ac parameters m27c2001 13/25 4 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. the parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in ta b l e 5 , operating and ac measurement conditions. designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. figure 6. ac testing input output waveform table 5. ac measurement conditions high speed standard input rise and fall times 10ns 20ns input pulse voltages 0 to 3v 0.4v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v table 6. capacitance (1) (t a = 25c, f = 1 mhz) 1. sampled only, not 100% tested symbol parameter test condition min max unit c in input capacitance v in = 0v 6 pf c out output capacitance v out = 0v 12 pf ai01822 3v high speed 0v 1.5v 2.4v standard 0.4v 2.0v 0.8v
m27c2001 dc and ac parameters 14/25 figure 7. ac testing load circuit ai01823b 1.3v out c l c l = 30pf for high speed c l = 100pf for standard c l includes jig capacitance 3.3k ? 1n914 device under test table 7. read mode dc characteristics (1) (t a = 0 to 70c or ?40 to 85c; v cc = 5v 5% or 5v 10%; v pp = v cc ) symbol parameter test condition min max unit i li input leakage current 0v v in v cc 10 a i lo output leakage current 0v v out v cc 10 a i cc supply current e = v il , g = v il , i out = 0ma, f = 5mhz 30 ma i cc1 supply current (standby) ttl e = v ih 1ma i cc2 supply current (standby) cmos e > v cc ? 0.2v 100 a i pp program current v pp = v cc 10 a v il input low voltage ?0.3 0.8 v v ih (2) input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = ?400a 2.4 v output high voltage cmos i oh = ?100a v cc ? 0.7v v 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. maximum dc voltage on output is v cc +0.5v.
dc and ac parameters m27c2001 15/25 table 8. programming mode dc characteristics (1) (t a = 25c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) symbol parameter test condition min max unit i li input leakage current 0 v in v ih 10 a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage ?0.3 0.8 v v ih input high voltage 2 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = ?400a 2.4 v v id a9 voltage 11.5 12.5 v 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 9. read mode ac characteristics (1) (t a = 0 to 70c or ?40 to 85c; v cc = 5v 5% or 5v 10%; v pp = v cc ) symbol alt parameter test condition m27c2001 unit -55 (2) -70 -80 -90 min max min max min max min max t avqv t acc address valid to output valid e = v il , g = v il 55 70 80 90 ns t elqv t ce chip enable low to output valid g = v il 55 70 80 90 ns t glqv t oe output enable low to output valid e = v il 30 35 40 40 ns t ehqz (3) t df chip enable high to output hi-z g = v il 0 30 0 30 0 30 0 30 ns t ghqz (3) t df output enable high to output hi-z e = v il 0 30 0 30 0 30 0 30 ns t axqx t oh address transition to output transition e = v il , g = v il 0000ns 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. in case of 55ns speed see high speed ac measurement conditions. 3. sampled only, not 100% tested.
m27c2001 dc and ac parameters 16/25 table 10. read mode ac characteristics (1) (t a = 0 to 70c or ?40 to 85c; v cc = 5v 5% or 5v 10%; v pp = v cc ) 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . symbol alt parameter test condition m27c2001 unit -10 -12 -15/-20/-25 min max min max min max t av q v t acc address valid to output valid e = v il , g = v il 100 120 150 ns t elqv t ce chip enable low to output valid g = v il 100 120 150 ns t glqv t oe output enable low to output valid e = v il 50 50 60 ns t ehqz (2) 2. sampled only, not 100% tested. t df chip enable high to output hi-z g = v il 0300 40 0 50 ns t ghqz (2) t df output enable high to output hi-z e = v il 0300 40 0 50 ns t axqx t oh address transition to output transition e = v il , g = v il 00 0 ns
dc and ac parameters m27c2001 17/25 figure 8. read mode ac waveforms table 11. programming mode ac characteristics (1) (t a = 25c; v cc = 6.25 0.25v; v pp = 12.75 0.25v) symbol alt parameter test condition min max unit t avpl t as address valid to program low 2 s t qvpl t ds input valid to program low 2 s t vphpl t vps v pp high to program low 2 s t vchpl t vcs v cc high to program low 2 s t elpl t ces chip enable low to program low 2 s t plph t pw program pulse width 95 105 s t phqx t dh program high to input transition 2 s t qxgl t oes input transition to output enable low 2 s t glqv t oe output enable low to output valid 100 ns t ghqz (2) t dfp output enable high to output hi-z 0 130 ns t ghax t ah output enable high to address transition 0 ns 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. ai00719b taxqx tehqz a0-a17 e g q0-q7 tavqv tghqz tglqv telqv valid hi-z valid
m27c2001 dc and ac parameters 18/25 figure 9. programming and verify modes ac waveforms tavpl valid ai00720 a0-a17 q0-q7 v pp v cc p g data in data out e tqvpl tvphpl tvchpl tphqx tplph tglqv tqxgl telpl tghqz tghax program verify
package mechanical data m27c2001 19/25 5 package mechanical data table 12. fdip32w - 32 pin ceramic frit-seal dip, with window, package mechanical data figure 10. fdip32w - 32 pin ceramic frit-seal dip, with window, package outline 1. drawing is not to scale. symbol mm inches typ min max typ min max a 5.72 0.225 a1 0.51 1.40 0.020 0.055 a2 3.91 4.57 0.154 0.180 a3 3.89 4.50 0.153 0.177 b 0.41 0.56 0.016 0.022 b1 1.45 ? ? 0.057 ? ? c 0.23 0.30 0.009 0.012 d 41.73 42.04 1.643 1.655 d2 38.10 ? ? 1.500 ? ? e 15.24 ? ? 0.600 ? ? e1 13.06 13.36 0.514 0.526 e 2.54 ? ? 0.100 ? ? ea 14.99 ? ? 0.590 ? ? eb 16.18 18.03 0.637 0.710 l 3.18 0.125 s 1.52 2.49 0.060 0.098 ? 7.11 ? ? 0.280 ? ? 4 11 4 11 n32 32 fdipw-a a3 a1 a l b1 b e d s e1 e n 1 c ea d2 ? eb a2
m27c2001 package mechanical data 20/25 table 13. pdip32 - 32 lead plastic dip, 600 mils width, package mechanical data figure 11. pdip32 - 32 lead plastic dip, 600 mils width, package outline 1. drawing is not to scale. symbol mm inches typ min max typ min max a ? 5.08 ? 0.200 a1 0.38 ? 0.015 ? a2 3.56 4.06 0.140 0.160 b 0.38 0.51 0.015 0.020 b1 1.52 ? ? 0.060 ? ? c 0.20 0.30 0.008 0.012 d 41.78 42.04 1.645 1.655 d2 38.10 ? ? 1.500 ? ? e 15.24 ? ? 0.600 ? ? e1 13.59 13.84 0.535 0.545 e1 2.54 ? ? 0.100 ? ? ea 15.24 ? ? 0.600 ? ? eb 15.24 17.78 0.600 0.700 l 3.18 3.43 0.125 0.135 s 1.78 2.03 0.070 0.080 0 10 0 10 n32 32 pdip a2 a1 a l b1 b e1 d s e1 e n 1 c ea eb d2
package mechanical data m27c2001 21/25 table 14. plcc32 - 32 lead plastic leaded chip carrier, package mechanical data figure 12. plcc32 - 32 lead plastic leaded chip carrier, package outline 1. drawing is not to scale. symbol millimeters inches typ min max typ min max a 2.54 3.56 0.100 0.140 a1 1.52 2.41 0.060 0.095 a2 0.38 0.015 b 0.33 0.53 0.013 0.021 b1 0.66 0.81 0.026 0.032 d 12.32 12.57 0.485 0.495 d1 11.35 11.56 0.447 0.455 d2 9.91 10.92 0.390 0.430 e 1.27 0.050 e 14.86 15.11 0.585 0.595 e1 13.89 14.10 0.547 0.555 e2 12.45 13.46 0.490 0.530 f 0.00 0.25 0.000 0.010 r 0.89 0.035 n32 32 nd 7 7 ne 9 9 cp 0.10 0.004 plcc-b d e3 e1 e 1 n d1 nd cp b e2 e b1 a1 a r 0.51 (.020) 1.14 (.045) f a2 e2 d2 d2
m27c2001 package mechanical data 22/25 table 15. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package mechanical data figure 13. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package outline 1. drawing is not to scale. symb mm inches typ min max typ min max a 1.20 0.047 a1 0.05 0.15 0.002 0.007 a2 0.95 1.05 0.037 0.041 b 0.15 0.27 0.006 0.011 c 0.10 0.21 0.004 0.008 d 19.80 20.20 0.780 0.795 d1 18.30 18.50 0.720 0.728 e 7.90 8.10 0.311 0.319 e 0.50 ? ? 0.020 ? ? l 0.50 0.70 0.020 0.028 0 5 0 5 n32 32 cp 0.10 0.004 tsop-a d1 e 1 n cp b e a2 a n/2 d die c l a1
part numbering scheme m27c2001 23/25 6 part numbering scheme table 16. ordering information scheme for a list of available options (speed, package, etc....) or for further information on any aspect of this de-vice, please contact the stmicroelectronics sales office nearest to you. example: m27c2001 -55 x c 1 tr device type m27 supply voltage c = 5v device function 2001 = 2 mbit (256kb x 8) speed ? 55 (1) = 55 ns 1. high speed, see ac characteristics section for further information. ? 70 = 70 ns ? 80 = 80 ns ? 90 = 90 ns ? 10 = 100 ns not for new design (2) 2. these speeds are replaced by the 100ns. ? 12 = 120 ns ? 15 = 150 ns ? 20 = 200 ns ? 25 = 250 ns v cc tolerance x = 5% blank = 10% package f = fdip32w b = pdip32 c = plcc32 n = tsop32: 8 x 20 mm temperature range 1 = 0 to 70c 6 = ?40 to 85c options tr = tape & reel packing
m27c2001 revision history 24/25 7 revision history st ruct ure table 17. document revision history date revision changes june 1998 1 first issue. 20-sep-2000 2 an620 reference removed. 29-nov-2000 3 plcc codification changed ( table 14 ). 10-may-2006 4 structure modified, ecopack text added. lccc32w package and the additional burn-in option (x) from ordering information scheme removed.
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